It is proposed to operate a semiconductor device with a lower power supply voltage as a measure for lowering power consumption of the semiconductor device such as an LSI (Large Scale Integration).
However, when the power voltage is just set low, driveability of a transistor is lowered.
When the driveability of the transistor is lowered, slew rate of a signal waveform becomes small, and operating speed becomes slower.
It is proposed to set a threshold voltage of the transistor low as a measure to secure the driveability of the transistor even when the power supply voltage is lowered.
[Patent Document 1] Japanese Laid-open Patent Publication No. 2003-86685
[Patent Document 2] Japanese Laid-open Patent Publication No. 2002-198439
[Patent Document 3] Japanese Laid-open Patent Publication No. 2007-42730
[Patent Document 4] Japanese Laid-open Patent Publication No. 2000-312004
However, when the threshold voltage of the transistor is just set low, a leak current increases. A power consumption is increased if the leak current increases. Besides, further downsizing of the semiconductor device has been demanded.